In the figure, the input is across the terminals
A and C and the output is across B and D. Then the output is

(a ) zero
( b) same as the input
( c) full - wave rectified
(d) half - wave rectified .

Answer

A

Explanation

( c ) During the half cycle when ` V_M gt V_N , D_1 and D_1 ` are forward
biased. Hence , the path of current is MABPQDCNM.
In the second half cycle, when ` V_N gt V_M , D_2 and D_4 ` are forward
biased while ` D_1 ` and `D_3` are reverse biased. Hence , the path of
current is NCBPQDAMN .
Therefore, in both half cycles current flows from P to Q from load
resistance ` R_L` . Or , it is a full - wave rectifier .
` .