As in truth table (i), the Boolean expression `y=A+B` is not satisfied. Therefore, its circuit must consist of a NOR gate and a NOT gate. The combination of gates will be as shown in Fig.9.66.
In truth table (ii), the Boolean expression `y=A+B` is partly satisfied, therefore, its circuit must consist of OR gate and NOT gate. The combination of gates is shown in Fig.9.66.
