An X-OR gate has following truth table:
It is represented by following logic relation
`y=barA.B+A.barB`
Build this gate using AND, OR and NOT gates.
`|{:(A,B,Y),(0,0,0),(0,1,1),(1,0,1),(1,1,0):}:|`

Explanation

Given, the logic relation for the given truth table is
`y=barA.B+A.barB=y_(1)+y_(2)`
Where `y_(1)=barA.B` and `y_(2)=A.barB`
`y_(1)` can be obtained as output of AND gate I for which one input is of A through NOT gate and another input is of B. `y_(2)` can be obtained as output of AND gate II for which one input is of A and other input is of B through NOT gate. Now y can be obtained as output from OR gate III, where, `y_(1)` and `y_(2)` are input of OR gate. Thus the given truth table can be obtained from the logic circuit