The following figure shows a logic gate circuit with two inputs `A` and `B` and the output `Y`. The voltage waveforms of `A,B` and the output `Y` are as given

Options

A. NOR gate
B. OR gate
C. AND gate
D. NAND gate

Answer

D

Explanation

For the given logic gate circuit, the input values of A, B and output value y are given as following:
For time 0 "to" `t_(1), A=1, B=1, y=0`
For time `t_(1) "to" t_(2), A=0, B=0, y=1`
For time `t_(2) "to" t_(3), A=0, B=1, y=1`
For time `t_(3) "to" t_(4), A=1, B=0, y=1`
For time `t_(4) "to" t_(5), A=1, B=1, y=0`
For time `t_(5) "to" t_(6), A=0, B=0, y=1`
For time t to `t_(6), A=0, B=1, y=1`
From above we note that output y is low when both the input are high, otherwise it is high. It satisfies the Boolean expression, `bar(A.B)=y`, which is for NAND gates. Thus logic circuit is NAND gate.