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The circuit diagram (see fig.) shows a '...

The circuit diagram (see fig.) shows a 'logic combination' with the states outputs `X,Y` and `Z` given for input `P,Q,R` and `S` all at state `1` (i.e., high). When inputs `P` and `R` change to state `0` i.e., low) with inputs `Q` and `S` still at `1`, the condition of output `X,Y` and `Z` chages to

A

1, 0, 0

B

1, 1, 1

C

0, 1, 0

D

0, 0, 1

Text Solution

Verified by Experts

The correct Answer is:
C
When `P=0, Q=1`, then output of AND gate
`X=0 ( :' A.B=y)`
When `R=0, S=1`, then output of NOR gate`=0`
`( :' bar(A.B)=y)`
and output of NOT gate `y=1 ( :' barA=y)`
When `X=0` and `Y=1`, then output of NOR gate is `Z=0`.
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PRADEEP-ELECTRONIC DEVICES-Exercise
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  2. The comdination of gates shown below yields

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  3. The circuit diagram (see fig.) shows a 'logic combination' with the st...

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  4. Truth table for system of four NAND gates as shown in figure is : .

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  6. In an n-p-n circuit transistor, the collector current is 10 mA. If 80%...

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  7. In a normal operation of a transistor,

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  8. In an n-p-n transistor circuit, the collector current ia 10 mA. If 90%...

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  9. Which of the following is/are correct relations in Boolean algebra?

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  10. The true statement (s) for a semiconductor is (are)

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  11. Which of the following is/are correct equations in Boolean algebra?

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  12. The impurity atoms with which pure silicon should be doped to make a p...

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  13. A transistor is connected in common emitter mode. The collector supply...

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  15. The distinction between conductors, insulators and semiconductors is l...

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  17. Which of the following statements concerning the depletion zone of an ...

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  18. The light emitting diode (LED),

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