In the circuit given below, `V(t)` is the sinusiodal voltage source, voltage drop `V_(AB)(t)` across the resistance `R` is

Options

A. Is half wave rectified
B. is full wave rectified
C. has the same peak value in the positive and negative half cycles
D. has different peak values during positive and negative half cycle

Answer

D

Explanation

In `+ve` half cycle, one diode is in forward bias and other in reverse bias, while in `-ve` half cycle their polarity reverse bias, direction of current is opposite through `R` for `+ve` and `-ve` half cycles so output is not rectified. Since `R_(1)!=R_(2)`, hence the peak values during `+ve` and `-ve` half of input dignal will be different.