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The truth table given below is for :- ...

The truth table given below is for :-
`{:(A,B,Y),(0,0,1),(0,1,0),(1,0,0),(1,1,1):}`

A

OR gate

B

AND gate

C

XNOR gate

D

XOR gate

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The correct Answer is:
C
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Thr truth table given below is for :- {:(A,B,Y),(0,0,1),(0,1,0),(1,0,0),(1,1,1):}

The truth table given below is for: |(A,B,X),(0,0,0),(0,1,0),(1,0,0),(1,1,1)|

Which of the following gate corresponds to the truth table given below : {:(A,B,Y),(0,0,1),(0,1,1),(1,0,1),(1,1,0):}

The truth table given below is for which gate? |(A,B,C),(0,0,1),(0,1,1),(1,0,1),(1,1,0)|

The truth table given in fig. represent : {:(A,B,Y),(0,0,0),(0,1,1),(1,0,1),(1,1,1):}

Using a suitable combination from a NOR, an OR and a NOT gate, draw circuits to obtain the truth table given below (i) |{:(A,B,y),(0,0,0),(0,1,0),(1,0,1),(1,1,0):}| (ii) |{:(A,B,y),(0,0,1),(0,1,1),(1,0,0),(1,1,1):}|

The truth-table given below is for which gate {:(A,0,0,1,1),(B,0,1,0,1),(C,1,1,1,0):}

The truth table given below belongs for which gates {:(A,B,Y),(0,0,0),(0,1,1),(1,0,1),(1,1,0):}

The given truth table relates Y to A and B. {:("A","B","Y"),(0,0,1),(0,1,0),(1,0,0),(1,1,0):} Then, Y is given by

MOTION-LOGIC GATES-EXERCISE - 1
  1. Which of the following relations is valid for Boolean algebra :-

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  2. The output of the given logic gate is 1 when inputs A,B and C are such...

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  3. The truth table given below is for :- {:(A,B,Y),(0,0,1),(0,1,0),(1,0...

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  4. The arrangement shown in figure performs the logic function of a/an….g...

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  5. The output of gate is low when at least one of its input is high. This...

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  6. A two inputed XOR gate produces an output high only when its both inpu...

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  7. You are given two circuits as shown in following figure. The logic ope...

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  8. In Boolean algebra A + B = Y implies that :

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  9. Given below are four logic tage symboles. Those for OR, NOR and NAND a...

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  10. The truth table shown below is for which of the following gates :- {...

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  11. When all the inputs of a NAND gate are connected together, the resulti...

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  12. Which of the following pairs are universal gates

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  13. A NAND gate followed by a NOT gate is :-

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  14. The NOR gate is logically equivalent to an OR gate followed by :-

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  15. The output of a two input NOR gate is in state 1 when :-

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  16. Output is LOW if and only if all the inputs are HIGH'. Indicate the lo...

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  17. The truth table given in fig. represent : {:(A,B,Y),(0,0,0),(0,1,1),...

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  18. The output Y of the combination of gates shown is equal to :-

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  19. The diagram of a logic circuit is given below. The output F of the cir...

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  20. The following congiguration of gates is equivalent to

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