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You are given two circuit as shown in Fi...

You are given two circuit as shown in Fig.and . Which consists of NAND gates. Identify the logic operation carried out by the two circuits.

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From fig(a). The output of NAND gate is connected to NOT gate (obtained from NAND gate ) Let `y^(1)` be the output of NAND gate and the final output of the combination of two gates is Y. The output of a NAND gate is O only when both the inputs are zero, while in NOT gate, the input gets inverted. Truth table for the arrangement

It is the truth tables of AND gate. Therefore the given circuit acts as AND gate.
(b) The output of two NOT gates are connected to NAND gate Let `Y_(1)andY_(2)` be the outputs of the two NOT gates and the final output of the combination of three gates be Y. In a NOT gate. the input gets inverted, while the output of a NAND gate is .O. only when both the inputs are zero. Truth table for given arrangement.
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NARAYNA-SEMICONDUCTOR ELECTRONICS-ADDITIONAL EXERCISE (ASSERTION AND REASON TYPE QUESTIONS :)
  1. You are given two circuit as shown in Fig.and . Which consists of NAND...

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  2. Assertion : the following circuit represents 'OR' gate Reason : f...

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  3. Assertion : In the following circuit the potential drop across the res...

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  4. Assertion: NOT gate is also called inverter circuit. Reason: NOT gat...

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  5. Assertion: The current gain in common base circuit is always less than...

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  6. Assertion : The dominant mechanism for motion of charge carreis in for...

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  7. Assertion : The value of current through p-n junction in the given fig...

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  8. Statement-I : A p-n junction with reverse bias can be used as a photod...

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  9. Assertion : In common base configuration, the current gain of the tran...

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  10. Statement-I : Germanium is preferred over silicon for making semicondu...

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  11. Assertion : The temparature coefficient of resistance is positive for ...

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  12. Assertion : For a given applied voltage, conduction current in n-type ...

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  13. Assertion : We cannot meausre that potential barrier of p-n junction b...

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  14. Assertion : In Zener diode depletion layer is thin. Reason : In rev...

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  15. Statement-I : A p-n junction with reverse bias can be used as a photod...

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  16. Statement-I : When base region has larger width, the collector current...

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  17. Statement-I : To be used as amplifier, the transistor in the common em...

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  18. Assertion : A transistor amplifier operates in active region. Reason...

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  19. Assertion: NAND or NOR gates are called digital building blocks. Rea...

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  20. Assertion : In transistor, common emitter configuration is used to mak...

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