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In the circuit shown in the figure, iden...

In the circuit shown in the figure, identify the equivalent gate of the circuit and make its truth table.

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AND gate.
Truth Table : `{:(A,B,A',B',Y'=A'+B',Y=Y'),(0,1,1,0," "1,0),(1,0,0,1," "1,0),(0,0,1,1," "1,0),(1,1,0,0," "0,1):}`
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