Draw the output signals `C_(1) and C_(2)` in the given combination of gates as shown in figure.

Explanation

For figure (3),

Here `C_(1)=barY= barbar(Y_(1)*Y_(2))=Y_(1)*Y_(2)=barA*barB=bar(A+B)`
`rArr ` Given logic circuit behaves like NOR gate. Its output `C_(1)` can be shown as follows:

Here `C_(2)=bar(Y_(1)+Y_(2))=bar(barA+barB)=barbar(A*B)=A*B`
Given logic circuit behaves like AND gate. Its truth table and output will be as shown below.