You are given two circuit as shown in Fig.and . Which consists of NAND gates. Identify the logic operation carried out by the two circuits.

Explanation

From fig (A). The output of `NAND` gate is connected to `NOT` gate (obtained from `NAND` gate) Let `Y^(1)` be the output `NAND` gate and the final output of the combination of two gates is `Y`. The output of `NAND` gate is `O` only when both the inputes are zero. while in `NOT` gate, the input gets inverted. Truth table for the arrangement.
`|{:(A,B,Y',Y),(0,0,1,0),(1,0,1,0),(0,1,1,0),(1,1,0,1):}:| = |:{:(A,B,Y),(0,0,0),(1,0, 0),(0,1,0),(1,1,1):}:|`
It is the truth tables of `AND` gate. Therefore the gven circuit acts as `AND` gate.
(b) The output of two `NOT` gates are connected to `NAND`gate Let `Y_(1)` and `Y_(2)` be the outputs of the two `NOT` gates and the final output of the combination of three gates be `Y`. In a `NOT` gates in input gets inverted, while the output of a `NAND` gate is 'O' only when both the inputs are zero. Truth table for given arrangement.
`|{:(A,B,Y),(0,0,0),(1,0,1),(0,1,1),(1,1,1):}:|`.