The combination of 'NAND' gates shown here in the figure below). are equivalent to :

Options

A. An OR gate and an AND gate respectively
B. An AND gate and a NOT gate respectively
C. An AND gate and an OR gate respectively
D. An OR gate and a NOT gate respectively

Answer

A

Explanation

`C = A bar B` (If a NAND is given only 1 input it is behaves ad NOT gate, as it is `bar(A A) = barA` (one input is divided in two and then passed through NAND)

i.e. OR gate.
For second circuit C = Not of (A NAND B)
i.e. ABD only