The circuit diagram (see fig.) shows a 'logic combination' with the states outputs `X,Y` and `Z` given for input `P,Q,R` and `S` all at state `1` (i.e., high). When inputs `P` and `R` change to state `0` i.e., low) with inputs `Q` and `S` still at `1`, the condition of output `X,Y` and `Z` chages to

Options

A. `{:(X,1),(Y,0),(Z,0):}`
B. `{:(X,1),(Y,1),(Z,1):}`
C. `{:(X,0),(Y,1),(Z,0):}`
D. `{:(X,0),(Y,0),(Z,1):}`

Answer

C

Explanation

The following arguments shall help us to arrive at the right choice.
`(i) AND` gate shall not responds to zero input.
`(ii)` Since `R` is zero and `S` is `1` therefore `NOR` gate gives zero. `NOT` gives `'1'` corresponds to `0`
`(iii) NOR` gate would not respond to `0` and `1`.